Field of the Invention
The present invention relates to the field of data processing and in particular to the decoding of instructions from different instruction sets.
Description of the Prior Art
Processors that can use instructions from different instruction sets are known. ARM® of Cambridge UK for example have processors that use an ARM instruction set and a thumb instruction set, thumb instructions being 16 bits wide and ARM instructions being 32 bits wide. In order for a decoder to know which instruction set is being used a free bit in the encoding of the instruction is used to indicate whether the instruction is an ARM or thumb instruction.
In some processor architectures there are a set of encodings that define instructions explicitly supported by the architecture and there are a set of free encodings that are available for users of the architecture to define their own instructions. In processor architectures that provide an encoding space available for users to define their own instructions, having a bit of an instruction encoding that is used to specify a particular instruction set raises its own problems.
It would be desirable to be able to provide a plurality of instructions sets without unduly increasing the encoding space and while allowing the possibility of users to define their own instructions.